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🌊 DPDK Mempool
Memory Pools, Ring Buffers, Cache Alignment, NUMA Awareness
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spranab/contextcache
: Persistent KV cache with content-hash addressing for tool-augmented LLMs
github.com
·
13h
·
Discuss:
Hacker News
🎴
TAO
Virtual-Memory Assisted
Buffer
Management In
Tiered
Memory
arxiv.org
·
1d
💭
Virtual Memory
abdimoallim/gc
: A header-only, conservative tracing garbage collector in C
github.com
·
8h
·
Discuss:
r/C_Programming
🗑️
Garbage Collection
BrewHub
PHL
: Low Latency, High Caffeine (Notion MCP Operations Ledger)
brewhubphl.com
·
3h
·
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DEV
💓
PHI Accrual
Linux
Fu
: The USB WiFi
Dongle
Exercise
hackaday.com
·
14h
🔍
eBPF
The Complete Guide to
Profiling
Go Services in Production
fulmenflux.co
·
13h
·
Discuss:
r/golang
📊
Profiling Tools
Mechanical
Sympathy
mechanical-sympathy.blogspot.com
·
9h
·
Discuss:
Hacker News
🗑️
Garbage Collection
RPU
: A
Chiplet-Based
Architecture To Address The Challenges of the Modern Memory Wall (Harvard University)
semiengineering.com
·
14h
🧠
PIM
Safe
mutation
with
mutex
closures
rednafi.com
·
8h
🔀
Crossbeam
Tailscale
on
NixOS
: A new Minecraft server in ten minutes
tailscale.com
·
6h
·
Discuss:
r/NixOS
📜
MultiPaxos
The ongoing quest for atomic
buffered
writes
lwn.net
·
2d
🚧
Memory Barriers
Islands
of
Invariance
rastamouse.me
·
9h
🌳
Instruction Selection
Node.js vs
FastAPI
Event Loop: A Deep Dive into Async
Concurrency
writings.dipchakraborty.com
·
10h
·
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DEV
🔄
Concurrency
Dependency
Chain
Stalls
computerenhance.com
·
1d
🦀
Rayon
I tested
Ugreen
's most powerful NAS, and it exposes everything
Synology
is getting wrong
xda-developers.com
·
11h
🌟
Pulsar
Battery Technical Quality Enforcement is Here: How to
Optimize
Common Wake
Lock
Use Cases
android-developers.googleblog.com
·
8h
·
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android-developers.googleblog.com
🔄
Busy Polling
Nitrux
6.0 Released With Linux
Kernel
6.19
linuxiac.com
·
1d
🖥️
SerenityOS
Tuning Flash Attention for Peak Performance in NVIDIA
CUDA
Tile
developer.nvidia.com
·
15h
⚡
Hardware Acceleration
Difference between
revisions
of "
Erlang
"
elinux.org
·
15h
🐹
golang
Micron sampling first 256GB
SOCAMM2
memory packages to customers — 2TB of RAM per CPU is now in reach of
datacenter
players
tomshardware.com
·
20h
🧩
mimalloc
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